Basim Alshar   Abstract – Recent digital applications require high speed and high performance designs. Thecircuit design can be implemented using different types of logic gates. The logic gates areclassified into two types; primitive and compound (complex) gates. Any complex logic circuitdiagram can be converted into primitive using one type of universal gates; such as the NANDgates or the NOR gates only. The combinational circuits and any functional block can also beimplemented using the NAND or the NOR gates only. This article shows how to build a 4-bit evenparity bit generator using both universal gate types: the implementation using NAND gates onlyand the implementation for the 4-bit even parity bit generator using NOR gates only. Aperformance comparison between these two implementations, with different output loads in eachcase, is achieved to study the impact of the output load on the circuit delay. It will also determinewhich type of universal gates can be used to get better performance (delay) readings by using thelogical effort technique. The logical effort is a technique used to estimate the static logic circuitdelay and the power dissipated by a circuit. It helps designers make their right decisions about thedelay and the power for a given design before the real implementation begins.